1. Field of the Invention
The present invention relates to an imaging apparatus. In more detail, when the signal processing system until the final video signal is formed from an imaging signal is driven by different clocks, a post-processing circuit is used in common without relation to the clock used by inserting a clock exchange circuit between a pre-processing circuit of a second clock and the post-processing circuit which is operated with a first clock which is higher than the second clock and transferring the pre-processing signal having been exchanged to the first clock from the second clock in the clock exchange circuit to the post-processing circuit.
2. Description of the Related Art
In an imaging apparatus comprising the recording and reproducing functions such as a camera-integrated video (video-integrated camera), an imaging device in different number of pixels, for example, a CCD is sometimes used as the imaging device. In this case, the clock (first clock) when a CCD having a large number of pixels is used is naturally higher in the frequency than the clock (second clock) when a CCD having a small number of pixels is used. At present, a CCD of the type using the second clock which is equal to 2/3 frequency of the first clock is known.
When the clocks used are different in the frequency as explained above, the signal processing system which can execute the processing with the clock depending on the CCD used is generally formed to obtain the final output signals (such as video signal and color signals of R, G, B) by processing the imaging signal obtained from the imaging device. Therefore, a plurality of imaging apparatuses in different types are used depending on the type of CCD used.
In the related art, as explained above, since a plurality of imaging apparatuses of different types are used depending on CCD used, the signal processing systems must be prepared depending on CCD and the interfaces for the imaging apparatuses must be prepared depending on the type of CCD.
Even in such a case, when the common part is structured in common as much as possible, possible cost-down may be realized. Moreover, when the signal processing system which can use the final output stage in common can be structured, it is no longer required to prepare a plurality of interfaces because the common interface with an external circuit can be used.